TY  - BOOK
AU  - García Zubía,Javier
TI  - Manual de VHDL: síntesis lógica para PLDs 
T2  - Engineering
SN  - 9788498307160
AV  - TK7874 eBook 
PY  - 2005///
CY  - Bilbao
PB  - Universidad de Deusto
KW  - VHDL (Computer hardware description language)
KW  - Logic circuits
KW  - Design and construction
KW  - Electronic books
N1  - Includes bibliographical references (pages 217-219)
UR  - httpss://www.digitaliapublishing.com/a/18107/
ER  -